This invention relates to an improved circuit for converting a single-ended input signal to a double-ended, or differential output signal.
There are various uses of double-ended, or differential, signals. For example, in gain controlling applications wherein it is preferred to use differential amplifiers, the operation of such differential amplifiers is enhanced if the signal supplied thereto is a differential signal. Typically, the original input signal which is to be utilized by that differential amplifier is a single-ended signal. Hence, it often is necessary to convert the single-ended signal to a differential output signal, that is, to a pair of output signals which change by equal but opposite amounts as the single-ended input signal changes.
When supplying a single-ended input signal to a differential amplifier of the type formed of a pair of differentially-connected transistors, the input signal is applied to the base of one of the differentially-connected transistors while the base of the other transistor is AC coupled to ground. The collectors of these transistors provide a pair of differential output signals. Generally, however, in this simple configuration, a resistive bias circuit is necessary to provide proper bias voltages to the differentially-connected transistors. As a consequence of this resistive bias circuit, the overall circuit construction is relatively complicated. Moreover, the power supply voltage, or operating potential, which normally is supplied to the transistors also must be used to derive the necessary bias voltages. This is an inefficient use of the operating potential supply.
One type of circuit which has been proposed for converting a single-ended input signal to a pair of differential output signals is formed of a pair of diodes connected in one series circuit which, in turn, is connected in parallel with another series circuit, the latter being constituted by the base-emitter path of a transistor and another diode. In the absence of any signal current supplied to this circuit, and assuming that a current source is provided to supply a constant current to the parallel-connected circuits, equal currents flow through the series-connected diodes and also through the collector-emitter circuit of the transistor and the additional diode which is connected to the emitter of that transistor. If the emitter region and the equivalent emitter regions of the diodes all are of equal areas, and if another transistor has its base-emitter path connected in parallel with the additional diode, then the currents through both transistors, in the absence of a signal current, are equal. If a signal current is supplied to the additional diode, that is, if an input signal is supplied to the junction formed by the connection of the emitter of the first transistor and the additional diode, then the currents through both transistors will change by an amount equal but opposite to each other only if the supplied signal current is much less than the quiescent current supplied by the current source. That is, if the signal current is represented as i.sub.s, then the currents through the two transistors can be represented as I.sub.o +i.sub.s /2 and I.sub.o -i.sub.s /2, wherein I.sub.o is the quiescent current supplied by the current source. Unfortunately, the requirement that the quiescent current must be much greater than the signal current means that either the current source must be very large, that is, must be capable of supplying a high current, or the signal current must be limited to be a very low value. Furthermore, if this relationship between the quiescent and signal currents is not maintained, significant distortion is introduced into the output currents which flow through the transistors. Consequently, this proposed circuit is not fully satisfactory.
Another proposed circuit for converting a single-ended input signal to a pair of differential output signals is described in U.S. Pat. No. 4,049,977. This disclosed circuit is formed of two series circuits connected in parallel, the first series circuit being formed of a pair of diodes, and the second series circuit being formed of an additional diode in series with the collector-emitter circuit of a transistor. The base of the transistor is, in turn, connected to the junction formed by the two diodes of the first series circuit. Output transistors have their base-emitter circuits connected in parallel with a respective diode in each of the series circuits. A current source supplies a quiescent current to the parallel circuits such that, in the absence of an input signal, the quiescent current I.sub.o flows through the first diode in each series circuit and, since the base-emitter voltage of each output transistor is equal to the voltage across each of the first diodes, the quiescent current I.sub.o also flows through the collector-emitter circuit of each output transistor. If an input signal is supplied to the second diode of the first series circuit, that is, if the input signal is supplied to the junction formed by the series diodes, then the output signal current through one output transistor increases by an amount which is equal to the decrease in the output signal current which flows through the other output transistor. More specifically, the output current through one of these transistors may be represented as I.sub.o +i.sub.s /4, while the output current through the other transistor may be represented as I.sub.o -i.sub.s /4. Although these differential output signal currents do not require the condition that the quiescent current I.sub.o be much greater than the signal current i.sub.s, there is, nevertheless, the disadvantage that the input signal current is significantly attenuated by this circuit arrangement. That is, each of the differential output signal currents exhibits an amplitude that is only one-fourth the amplitude of the input signal current. Stated otherwise, the aforedescribed circuit arrangement exhibits a relatively poor current gain factor.